Accessing GPIO controllers is pretty straightforward with PetaLinux, but there are a few tricks you need to know.<\/p>\n
In the example FPGA I am using, there are two GPIO controllers in the programmable logic. These are at address 0x4120_0000 and 0x4121_0000. If you look in the If you make a PetaLinux build and boot it, you can look in the You can see that there is a How will\u00a0you know which is which, though? Each directory contains a label file which tells you the device tree label for the controller. You can go ahead and look at the contents:<\/p>\n Looking at it, you’ll\u00a0see that gpiochip901 corresponds to my controller at 0x4120_0000 and gpiochip902 corresponds to the controller at 0x4121_0000. Gpiochip906 is different, and corresponds to the built-in controller on the ZYNQ. Why those numbers? In my FPGA, the first GPIO controller controls only a single GPIO bit, while the second controls four bits. We can tell how many bits each controller controls by looking in the It looks to me like the numbering starts at 901. Since that controller has only a single GPIO bit, the next controller is 902. That one has four bits, so the ZYNQ PS controller goes at 906, which has 118 bits.<\/p>\n To access a GPIO bit, you need to enable the correct GPIO pin. You do that by writing to the Now if you look in the If you look in that directory you see a number of controls:<\/p>\n You can determine the GPIO direction by looking at the You can change the value to a 1 by writing to the value file.<\/p>\n So there you have it. The “official” way to access GPIO on PetaLinux.<\/p>\n","protected":false},"excerpt":{"rendered":" Accessing GPIO controllers is pretty straightforward with PetaLinux, but there are a few tricks you need to know. Locating the GPIO controller In the example FPGA I am using, there are two GPIO controllers in the programmable logic. These are … Continue reading pl.dtsi<\/code> file in your PetaLinux project, in the directory subsystems\/linux\/configs\/device-tree<\/code>, you will see entries for the GPIO devices. There’s no need to modify the entire device tree.<\/p>\n\/sys\/class\/gpio<\/code> directory.<\/p>\nroot@pz-7015-2016-2:~# ls \/sys\/class\/gpio\/ \r\nexport gpiochip901 gpiochip902 gpiochip906 unexport\r\n<\/pre>\n
gpiochip<\/code> directory for each GPIO controller. The gpiochip901<\/code> and gpiochip902<\/code> directories correspond to the PL controllers that I added in my design. The gpiochip906<\/code> directory is for the GPIO controller in the PS.<\/p>\nroot@pz-7015-2016-2:~# cat \/sys\/class\/gpio\/gpiochip901\/label \r\n\/amba_pl\/gpio@41210000\r\nroot@pz-7015-2016-2:~# cat \/sys\/class\/gpio\/gpiochip902\/label \r\n\/amba_pl\/gpio@41200000\r\nroot@pz-7015-2016-2:~# cat \/sys\/class\/gpio\/gpiochip906\/label \r\nzynq_gpio\r\n<\/pre>\n
ngpio<\/code> file for the controller.<\/p>\nroot@pz-7015-2016-2:~# cat \/sys\/class\/gpio\/gpiochip901\/ngpio \r\n1\r\nroot@pz-7015-2016-2:~# cat \/sys\/class\/gpio\/gpiochip902\/ngpio\r\n4\r\nroot@pz-7015-2016-2:~# cat \/sys\/class\/gpio\/gpiochip906\/ngpio\r\n118\r\n<\/pre>\n
Enabling the GPIO bits<\/h1>\n
export<\/code> file in the \/sys\/class\/gpio<\/code> directory. Here is an example of enabling the LSB of my second controller:<\/p>\nroot@pz-7015-2016-2:~# echo -n 902 > \/sys\/class\/gpio\/export \r\n<\/pre>\n
\/sys\/class\/gpio<\/code> directory, you will see a new directory created which allows you to control the individual GPIO pin.<\/p>\nroot@pz-7015-2016-2:~# ls \/sys\/class\/gpio\r\nexport gpio902 gpiochip901 gpiochip902 gpiochip906 unexport\r\n<\/pre>\n
root@pz-7015-2016-2:~# ls \/sys\/class\/gpio\/gpio902\r\nactive_low direction power subsystem uevent value\r\n<\/pre>\n
Accessing the GPIO bits<\/h1>\n
direction<\/code> file. Since my GPIO pin is an output, it gives the value out<\/em>.<\/p>\nroot@pz-7015-2016-2:~# cat \/sys\/class\/gpio\/gpio902\/direction\r\nout\r\n<\/pre>\n
root@pz-7015-2016-2:~# echo 1 > \/sys\/class\/gpio\/gpio902\/value \r\n<\/pre>\n
Conclusion<\/h1>\n