vpp.pl – Verilog Pre-Processor


vpp.pl [ +define+var ] [ +define+var+var2++varN ] [ +define+var=val1+var2=val2++varN=valN ] [ +incdir+dir1 ] [ +incdir+dir1+dir2++dirN ] [ -f command_file ] [ -output file ] [ -perl [ –perlinc dir ]+ ] [ -deps file ] file

See below for more descriptions of the switches.


vpp.pl is a Verilog pre-processor. Without the -perl option, it reads the source file and writes it to standard output with all ifdef statements expanded out and all include files included. With the -perl option, specially marked lines are interpreted as perl code (see below).



The +define option defines Verilog preprocessor variables. The syntax is the same as for Verilog.


Specifies directories to search for include files. The syntax is the same as for Verilog.

-f file

Read file and treat the contents as arguments to vpp.pl

-output file

Write the output of the preprocessor to file. By default, output is written to standard output.


Interpret Perl code in the source file.

In this mode, the source text is converted into a Perl program. This program is then run and the resulting output is written to the output file. Text lines are double quoted Perl strings, so all Perl variable interpolation applies.

Code within specially marked comments is passed directly into the generated perl program. This allows embedder Perl code within the vpp.pl source file. These comments are either a single line comment marked with //@ or comments spanning multiple lines starting with /*@ and ending with @*/.

For example, say you needed to instantiate a model but the model uses bit blasted ports. You could use the following construct.

  //@ for my $i (0..7) {
  //@ }

Notice the use of $i in the line which does not contain Perl code. The variable is interpolated into the output string. You need to be careful if you need a Perl variable expanded but it is in a context that makes Perl think the variable is something else. For example, suppose the above example was two dimensional and the input words were data0 through data7. We would need nested for loops like this.

  //@ for my $i (0..7) {
    //@ for my $j (0..7) {
      .D$i$j(data$i [$j]),
    //@ }
  //@ }

Notice the space between the $i and the [$j]. This prevents Perl from interpreting $i[$j] as an array reference into the @i array.

Also, sometimes you need to have a string directly follow a variable. Suppose the data vector in the previous example was named Pndata. You would use curly braces to let Perl know where the variable ended. Like this…

  //@ for my $i (0..7) {
    //@ for my $j (0..7) {
    //@ }
  //@ }

-perlinc directory

The -perlinc option specifies a directors which should be added to the Perl library search path when the generated Perl program is run. This is useful for finding project specific libraries.

-deps file

Generate dependencies suitable for GNU Make in file.


vpp.pl makes variables defined on the command line available to Perl code embedded within the source text. This is done using an associative array called %defines.




Pete Johnson

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  1. Pingback: A Verilog Preprocessor | Beyond Circuits

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